Semiconductor components are used in the fabrication of electronic items such as multichip modules. For example, bare semiconductor dice can be mounted to substrates such as printed circuit boards, and ceramic interposers. Flip chip mounting of bumped dice is one method for electrically connecting the dice to the substrates. With flip chip mounting, solder bumps on the device bond pads are reflowed into electrical contact with contacts on the substrate. Chip on board (COB) mounting of dice to substrates can also be employed. With chip on board mounting, wire bonds are formed between the device bond pads and contacts on the substrate.
Chip scale packages are sometimes used in place of bare dice for fabricating electronic items. Typically, a chip scale package includes a substrate bonded to the face of a bare die. The substrate includes external contacts for making outside electrical connections to the chip scale package. The external contacts for one type of chip scale package include solder balls arranged in a dense array such as a ball grid array (BGA) or a fine ball grid array (FBGA). In general, chip scale packages can be mounted to substrates using the same mounting methods employed with bare dice.
Besides making permanent electrical connections between semiconductor components and substrates for fabricating multichip modules or other packaging applications, electrical connections are necessary for testing applications. For example, bare dice are tested in the manufacture of known good dice (KGD). Chip scale packages must also be tested prior to use in electronic items. In these cases, electrical connections with device bond pads for bare dice, or with the external contacts for chip scale packages, are typically non-bonded, temporary electrical connections.
In either packaging or testing applications, a substrate includes contacts that must be physically aligned with, and then electrically connected to, corresponding contacts on a component. As semiconductor components become smaller, and contacts become denser, aligning and electrically connecting components to substrates become more difficult. Accordingly, a design consideration in packaging and testing of semiconductor components is a method for aligning and connecting components to mating substrates.
As such, one such problem facing the semiconductor industry is how to planarize a probe card to a wafer during testing of individual die on that wafer. During probe testing a probe card must be aligned and placed in electrical contact with a wafer. When the wafer and probe card are moved together in a vertical direction, contacts on the wafer may not always engage contacts on the probe card along the same plane. Such misalignment can cause pivoting of the wafer or the probe card. Also, the potential of misalignment can require overdriving the wafer or the probe card in the vertical direction to make reliable electrically connections. This overdrive can damage contacts. In addition, if planarization is not achieved, then some probes may apply more pressure to corresponding lead pads on a die, while others may apply less. This could result in incomplete electrical interfacing with the die so that the die tests bad, or that the lead pads to which more pressure is applied are physically damaged—thereby making it impossible to use the die in a finished product. Further, as the number of probes is increased in probe apparatus, tilting becomes more of a problem.
Besides the above examples, alignment problems can occur in other semiconductor packaging or assembly processes such as wire bonding and adhesive bonding of dice to leadframes. Another manufacturing process involving alignment occurs during fabrication of flat panel field emission displays (FEDs). An individual field emission display pixel includes emitter sites formed on a baseplate. Electrons emitted by the emitter sites strike phosphors contained on a display screen to form an image. During fabrication of the field emission display it is necessary to align the baseplate with the display screen. However, field emission displays are typically constructed as a sealed package with a vacuum space between the baseplate and the display screen. This space complicates the alignment procedure because most alignment devices, such as aligner bonder tools, are constructed to bring the mating components into physical contact.
A need for alignment of a platen also arises in industries unrelated to semiconductor testing; most importantly, in metal stamping and in printing. The forces involved in these applications are relatively large in comparison to the forces involved in testing a semiconductor wafer, for example. Hydraulic cylinders have been used in various configurations to support and level a platen involved in metal stamping and printing. Generally, the one or more hydraulic cylinders supporting a platen are relatively long, with a stroke that is comparable to or larger than the bore. At the high forces and hydraulic pressures involved in these applications, compressibility of the hydraulic fluid is a significant factor in determining the position and movement of the platen as the press is actuated. Compression of the hydraulic fluid in supporting hydraulic cylinders is used as a cushion in high force presses that helps to level the loading of the press. As the influence of compressibility of the hydraulic fluid increases with length of the cylinder, a long hydraulic cylinder is used to provide cushioning that acts to level the platen under force. In certain configurations of the prior art, fluid is allowed to flow between hydraulic cylinders in a press in order to level the load. However, because of the length of the hydraulic cylinders used in presses, the cylinders are not an accurate method of setting the height of the platen. More accurate means are needed to set and maintain alignment that are not sensitive to pressure, temperature, and loading.
In light of the above, there is a need in the art for method and apparatus that can align and level a substrate and a test head or electronic components.